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19-2320; Rev 0; 1/02
15kV ESD-Protected 52Mbps, 3V to 5.5V, SOT23 RS-485/RS-422 True Fail-Safe Receivers
General Description
The MAX3280E/MAX3281E/MAX3283E/MAX3284E are single receivers designed for RS-485 and RS-422 communication. These devices guarantee data rates up to 52Mbps, even with a 3V power supply. Excellent propagation delay (15ns max) and package-to-package skew time (8ns max) make these devices ideal for multidrop clock distribution applications. The MAX3280E/MAX3281E/MAX3283E/MAX3284E have true fail-safe circuitry, which guarantees a logichigh receiver output when the receiver inputs are opened or shorted. The receiver output will be a logic high if all transmitters on a terminated bus are disabled (high impedance). These devices feature 1/4-unit-load receiver input impedance, allowing up to 128 receivers on the same bus. The MAX3280E is a single receiver available in a 5-pin SOT23 package. The MAX3281E/MAX3283E single receivers have a receiver enable (EN or EN) function and are offered in a 6-pin SOT23 package. The MAX3284E features a voltage logic pin that allows compatibility with low-voltage logic levels, as in digital FPGAs/ASICs. On the MAX3284E, the voltage threshold for a logic high is user-defined by setting VL in the range from 1.65V to V CC . The MAX3284E is also offered in a 6-pin SOT23 package.
Features
o ESD Protection: 15kV-Human Body Model 6kV-IEC 1000-4-2, Contact Discharge 12kV-IEC 1000-4-2, Air-Gap Discharge o Guaranteed 52Mbps Data Rate o Guaranteed 15ns Receiver Propagation Delay o Guaranteed 2ns Receiver Skew o Guaranteed 8ns Package-to-Package Skew Time o VL Pin for Connection to FPGAs/ASICs o Allow Up to 128 Transceivers on the Bus (1/4-unit-load) o Tiny SOT23 Package o True Fail-Safe Receiver o -7V to +12V Common-Mode Range o 3V to 5.5V Power-Supply Range o Enable (High and Low) Pins for Redundant Operation o Three-State Output Stage (MAX3281E/MAX3283E) o Thermal Protection Against Output Short Circuit
MAX3280E/MAX3281E/MAX3283E/MAX3284E
Applications
Clock Distribution Telecom Racks Base Stations Industrial Control Local Area Networks
Pin Configurations appear at end of data sheet.
PART MAX3280EAUK-T MAX3281EAUT-T MAX3283EAUT-T MAX3284EAUT-T
Ordering Information
TEMP RANGE -40C to +125C -40C to +125C -40C to +125C -40C to +125C PINPACKAGE 5 SOT23-5 6 SOT23-6 6 SOT23-6 6 SOT23-6 TOP MARK ADVM ABAT ABAU ABAV
Selector Guide
PART MAX3280E MAX3281E MAX3283E MAX3284E VL -- -- -- ENABLE -- Active High Active Low -- DATA RATE 52Mbps 52Mbps 52Mbps 52Mbps (Note 1) PACKAGE 5-Pin SOT23 6-Pin SOT23 6-Pin SOT23 6-Pin SOT23
Note 1: MAX3284E data rate is dependent on VL. ________________________________________________________________ Maxim Integrated Products 1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at 1-888-629-4642, or visit Maxim's website at www.maxim-ic.com.
15kV ESD-Protected 52Mbps, 3V to 5.5V, SOT23 RS-485/RS-422 True Fail-Safe Receivers MAX3280E/MAX3281E/MAX3283E/MAX3284E
ABSOLUTE MAXIMUM RATINGS
(All Voltages Referenced to GND) Supply Voltage (VCC) ...............................................-0.3V to +6V Control Input Voltage (EN, EN).................................-0.3V to +6V VL Input Voltage .......................................................-0.3V to +6V Receiver Input Voltage (A, B)..............................-7.5V to +12.5V Receiver Output Voltage (RO)....................-0.3V to (VCC + 0.3V) Receiver Output Voltage (RO) (MAX3284E) .....................................-0.3V to (VL + 0.3V) Receiver Output Short-Circuit Current .......................Continuous Continuous Power Dissipation (TA = +70C) 5-Pin SOT23 (derate 7.1mW/C above +70C)............571mW 6-Pin SOT23 (derate 8.7mW/C above +70C)............696mW Operating Temperature Range MAX328_EA__ ..............................................-40C to +125C Storage Temperature Range .............................-65C to +150C Junction Temperature ......................................................+150C Lead Temperature (soldering, 10s) .................................+300C
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(VCC = 3V to 5.5V, VL = VCC, TA = TMIN to TMAX, unless otherwise noted. Typical values are at VCC = 5V and TA = +25C.) (Notes 2, 3)
PARAMETER Supply Voltage Supply Current VL Input Range VL Supply Current RECEIVER Input Current (A and B) Receiver Differential Threshold Voltage Receiver Input Hysteresis Receiver Enable Input Low Receiver Enable Input High Receiver Enable Input Leakage IA, B VTH VTH VENIL VENIH ILEAK VCC = GND or 5.5V -7V VCM +12V (Note 4) V A + VB = 0 MAX3281E, MAX3283E only MAX3281E, MAX3283E only MAX3281E, MAX3283E only MAX3280E/MAX3281E/MAX3283E, IOH = -4mA, RO high MAX3284E, IOH = -1mA, 1.65V VL VCC, RO high MAX3280E/MAX3281E/MAX3283E, IOL = 4mA, RO low MAX3284E, IOL = 1mA, 1.65V VL VCC, RO low 0 VO VCC, RO = high impedance -7V VCM +12V (Note 5) 0 VRO VCC 48 130 VCC - 0.4 V VL - 0.4 0.4 V 0.4 5 A k mA 2 10 VIN = +12V VIN = -7V -200 -125 25 0.4 250 -200 -50 A mV mV V V A SYMBOL VCC ICC VL IL No load MAX3284E No load (MAX3284E) 1.65 CONDITIONS MIN 3.0 9 TYP MAX 5.5 15 VCC 10 UNITS V mA V A
Receiver Output High Voltage
VOH
Receiver Output Low Voltage
VOL
Three-State Output Current at Receiver Receiver Input Resistance Receiver Output Short-Circuit Current ESD PROTECTION
IOZR RIN IOSR
Human Body Model ESD Protection (A, B) IEC1000-4-2 (Air-Gap Discharge) IEC1000-4-2 (Contact Discharge)
15 12 6 kV
2
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15kV ESD-Protected 52Mbps, 3V to 5.5V, SOT23 RS-485/RS-422 True Fail-Safe Receivers
SWITCHING CHARACTERISTICS
(VCC = 3V to 5.5V, VL = VCC, TA = TMIN to TMAX, unless otherwise noted. Typical values are at VCC = 5V and TA = +25C.) (Notes 2, 3)
PARAMETER Maximum Data Rate Receiver Propagation Delay Receiver Output |tPLH - tPHL| Device-to-Device Propagation Delay Matching SYMBOL fMAX tPLH tPHL tPSKEW CONDITIONS CL = 15pF (Notes 5, 6) Figure 1, CL = 15pF, VID = 2V, VCM = 0 Figure 1, CL = 15pF, VID = 2V, VCM = 0 Figure 1, CL = 15pF, TA = +25C Same power supply, maximum temperature difference between devices = +30C. (Note 5) MIN 52 7 8 15 15 2 8 TYP MAX UNITS Mbps ns ns ns
MAX3280E/MAX3281E/MAX3283E/MAX3284E
ENABLE/DISABLE TIME FOR MAX3281E/MAX3283E Receiver Enable to Output Low Receiver Enable to Output High Receiver Disable Time from Low Receiver Disable Time from High tPRZL tPRZH tPRLZ tPRHZ Figure 2, CL = 15pF Figure 2, CL = 15pF Figure 2, CL = 15pF Figure 2, CL = 15pF 500 500 500 500 ns ns ns ns
Note 2: Parameters are 100% production tested at +25C, limits over temperature are guaranteed by design. Note 3: All currents into the device are positive; all currents out of the device are negative. All voltages are referenced to device ground, unless otherwise noted. Note 4: VCM is the common-mode input voltage. VID is the differential input voltage. Note 5: Not production tested. Guaranteed by design. Note 6: See Table 2 for MAX3284E data rates with VL < VCC.
Typical Operating Characteristics
(VCC = 3.3V, TA = +25C, unless otherwise noted.)
RECEIVER OUTPUT LOW VOLTAGE vs. OUTPUT CURRENT
MAX3280/1/3/4E toc01
RECEIVER OUTPUT HIGH VOLTAGE vs. OUTPUT CURRENT
MAX3280/1/3/4E toc02
RECEIVER OUTPUT HIGH VOLTAGE vs. TEMPERATURE
RECEIVER OUTPUT HIGH VOLTAGE (V) VCC = 5V 4.5
MAX3280/1/3/4E toc03
5
5
5.0
4 OUTPUT VOLTAGE (V)
4 OUTPUT VOLTAGE (V) VCC = 5V 3 VCC = 3.3V 2
3
VCC = 3.3V VCC = 5V
4.0
2
3.5 VCC = 3.3V 3.0 A = 1V, B = GND, IOH = -4mA -50 -25 0 25 50 75 100 125
1
1
0 0 10 20 30 40 50 60 OUTPUT CURRENT (mA)
0 -50 -40 -30 -20 -10 0 OUTPUT CURRENT (mA)
2.5
TEMPERATURE (C)
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15kV ESD-Protected 52Mbps, 3V to 5.5V, SOT23 RS-485/RS-422 True Fail-Safe Receivers MAX3280E/MAX3281E/MAX3283E/MAX3284E
Typical Operating Characteristics (continued)
(VCC = 3.3V, TA = +25C, unless otherwise noted.)
RECEIVER OUTPUT LOW VOLTAGE vs. TEMPERATURE
MAX3280/1/3/4E toc04
RECEIVER PROPAGATION DELAY (tPLH) vs. TEMPERATURE
MAX3280/1/3/4E toc05
RECEIVER PROPAGATION DELAY (tPHL) vs. TEMPERATURE
MAX3280/1/3/4E toc06
200 RECEIVER OUTPUT LOW VOLTAGE (mV)
9
10
150 VCC = 3.3V 100 VCC = 5V
8 VCC = 5V tPLH (ns)
9 tPHL (ns) VCC = 5V 8 VCC = 3.3V 7
7 VCC = 3.3V 6
50 5 A = GND, B = 1V, IOL = 4mA 0 -50 -25 0 25 50 75 100 125 TEMPERATURE (C) 4 -50 -25 0 25 50 75 100 125 TEMPERATURE (C)
6 -50 -25 0 25 50 75 100 125 TEMPERATURE (C)
SUPPLY CURRENT vs. TEMPERATURE
MAX3280/1/3/4E toc07
MAX3284E MAXIMUM DATA RATE vs. VOLTAGE LOGIC LEVEL
MAX3280/1/3/4E toc08
9 VCC = 5V SUPPLY CURRENT (mA) 8
60
50 DATA RATE (Mbps)
7
40
6 VCC = 3.3V 5 -50 -25 0 25 50 75 100 125 TEMPERATURE (C)
30
20 1.5 2.5 3.5 4.5 5.5 VOLTAGE LOGIC LEVEL (V)
SUPPLY CURRENT vs. DATA RATE
MAX3280/1/3/4E toc09
VL SUPPLY CURRENT vs. TEMPERATURE
MAX3280/1/3/4 toc10
10 ICC, VCC = VL = 5V 8 SUPPLY CURRENT (mA) ICC, VCC = VL = 3.3V IL, VCC = VL = 5V 4
10
VL SUPPLY CURRENT (mA)
1
6
VCC = VL = 5V DATA RATE = 52Mbps VCC = VL = 3.3V DATA RATE = 52Mbps
0.1 VCC = VL = 5V DATA RATE = 100kbps 0.01 VCC = VL = 3.3V DATA RATE = 100kbps
2 IL, VCC = VL = 3.3V 0 10 100 1000 DATA RATE (kbps) 10,000 100,000
0.001 -50 -25 0 25 50 75 100 125 TEMPERATURE (C)
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15kV ESD-Protected 52Mbps, 3V to 5.5V, SOT23 RS-485/RS-422 True Fail-Safe Receivers
Pin Description
PIN MAX3280E 1 2 3 4 -- -- MAX3281E 1 2 3 4 -- 5 MAX3283E 1 2 3 4 5 -- MAX3284E 1 2 3 4 -- -- NAME VCC GND RO B EN EN FUNCTION Positive Supply: 3V VCC 5.5V. Bypass with a 0.1F capacitor to GND. Ground Receiver Output. RO will be high if (A-B) -50mV. RO will be low if (A-B) -200mV. Inverting Receiver Input Receiver Output Enable. Drive EN low to enable RO. When EN is high, RO is high impedance. Receiver Output Enable. Drive EN high to enable RO. When EN is low, RO is high impedance. Low-Voltage Logic-Level Supply Voltage. VL is a user-defined voltage, ranging from 1.65V to VCC. RO output high is pulled up to VL. Bypass with a 0.1F capacitor to GND. Noninverting Receiver Input
MAX3280E/MAX3281E/MAX3283E/MAX3284E
-- 5
-- 6
-- 6
5 6
VL A
Detailed Description
The MAX3280E/MAX3281E/MAX3283E/MAX3284E are single, true fail-safe receivers designed to operate at data rates up to 52Mbps. The fail-safe architecture guarantees a high output signal if both input terminals are open or shorted together. See the True Fail-Safe section. This feature assures a stable and predictable output logic state with any transmitter driving the line. These receivers function with a 3.3V or 5V supply voltage and feature excellent propagation delay times (15ns). The MAX3280E is a single receiver available in a 5-pin SOT23 package. The MAX3281E (EN, active high) and MAX3283E (EN, active low) are single receivers that also contain an enable pin. Both the MAX3281E and MAX3283E are available in a 6-pin SOT23 package. The MAX3284E is a single receiver that contains a VL pin, which allows communication with low-level logic included in digital FPGAs. The MAX3284E is available in a 6-pin SOT23 package. The MAX3284E's low-level logic application allows users to set the logic levels. A logic high level of 1.65V will limit the maximum data rate to 20Mbps.
15kV ESD without damage. After an ESD event, this family of parts continues working without latchup. ESD protection can be tested in several ways. The receiver inputs are characterized for protection to the following: * 15kV using the Human Body Model * 6kV using the Contact Discharge method specified in IEC 1000-4-2 (formerly IEC 801-2) * 12kV using the Air-Gap Discharge method specified in IEC 1000-4-2 (formerly IEC 801-2)
ESD Test Conditions
ESD performance depends on a number of conditions. Contact Maxim for a reliability report that documents test setup, methodology, and results.
Human Body Model
Figure 3a shows the Human Body Model, and Figure 3b shows the current waveform it generates when discharged into a low impedance. This model consists of a 100pF capacitor charged to the ESD voltage of interest, which is then discharged into the device through a 1.5k resistor.
15kV ESD Protection
ESD-protection structures are incorporated on the receiver input pins to protect against ESD encountered during handling and assembly. The MAX3280E/ MAX3281E/MAX3283E/MAX3284E receiver inputs (A, B) have extra protection against static electricity found in normal operation. Maxim's engineers developed state-of-the-art structures to protect these pins against
IEC 1000-4-2
Since January 1996, all equipment manufactured and/or sold in the European community has been required to meet the stringent IEC 1000-4-2 specification. The IEC 1000-4-2 standard covers ESD testing and performance of finished equipment; it does not specifically refer to integrated circuits. The MAX3280E/MAX3281E/MAX3283E/MAX3284E help
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15kV ESD-Protected 52Mbps, 3V to 5.5V, SOT23 RS-485/RS-422 True Fail-Safe Receivers MAX3280E/MAX3281E/MAX3283E/MAX3284E
users design equipment that meets Level 3 of IEC 10004-2, without additional ESD-protection components. The main difference between tests done using the Human Body Model and IEC 1000-4-2 is higher peak current in IEC 1000-4-2. Because series resistance is lower in the IEC 1000-4-2 ESD test model (Figure 4a), the ESD-withstand voltage measured to this standard is generally lower than that measured using the Human Body Model. Figure 4b shows the current waveform for the 8kV IEC 1000-4-2 Level 4 ESD Contact Discharge test. The Air-Gap test involves approaching the device with a charger probe. The Contact Discharge method connects the probe to the device before the probe is energized.
Table 1. MAX3281E/MAX3283E Enable Table
PART MAX3281E MAX3283E ENABLE = HIGH Active High Z ENABLE = LOW High Z Active
Low-Voltage Logic Levels (MAX3284E only)
An increasing number of applications now operate at low-voltage logic levels. To enable compatibility with these low-voltage logic level applications, such as digital FPGAs, the MAX3284E VL pin is a user-defined supply voltage that designates the voltage threshold for a logic high. At lower VL voltages, the data rate will also be lower. A logic-high level of 1.65V will receive data at 20Mbps. Table 2 gives data rates at various voltages at VL.
Machine Model
The Machine Model for ESD testing uses a 200pF storage capacitor and zero-discharge resistance. It mimics the stress caused by handling during manufacturing and assembly. All pins (not just the RS-485 inputs) require this protection during manufacturing. Therefore, the Machine Model is less relevant to the I/O ports than are the Human Body Model and IEC 1000-4-2.
Table 2. MAX3284E Data Rate Table
VCC = 3V TO 5.5V VL 1.65V 2.2V 3.3V MAXIMUM DATA RATE 20Mbps 33Mbps 52Mbps
True Fail-Safe
The MAX3280E/MAX3281E/MAX3283E/MAX3284E guarantee a logic-high receiver output when the receiver inputs are shorted or open, or when they are connected to a terminated transmission line with all drivers disabled. This guaranteed logic high is achieved by setting the receiver threshold between -50mV and -200mV. If the differential receiver input voltage (A-B) is greater than or equal to -50mV, RO is logic high. If (A-B) is less than or equal to -200mV, RO is logic low. In the case of a terminated bus with all transmitters disabled, the receiver's differential input voltage is pulled to ground by the termination. This results in a logic high with a 50mV minimum noise margin. Unlike previous fail-safe devices, the -50mV to -200mV threshold complies with the 200mV EIA/TIA-485 standard.
Applications Information
Propagation Delay Matching
The MAX3280E/MAX3281E/MAX3283E/MAX3284E (VCC = VL) exhibit propagation delays that are closely matched from one device to another, even between devices from different production lots. This feature allows multiple data lines to receive data and clock signals with minimal skew with respect to each other. Figure 5 shows the typical propagation delays. Small receiver skew times, the difference between the low-tohigh and high-to-low propagation delay, help maintain a symmetrical ratio (50% duty cycle). The receiver skew time | tPLH - tPHL | is under 2ns for either a 3.3V supply or a 5V supply.
Receiver Enable (MAX3281E and MAX3283E only)
The MAX3281E and MAX3283E feature a receiver output enable (EN, MAX3281E or EN, MAX3283E) input that controls the receiver. The MAX3281E receiver enable (EN) pin is active high, meaning the receiver outputs are active when EN is high. The MAX3283E receiver enable (EN) pin is active low. Receiver outputs are high impedance when the MAX3281E's EN pin is low and when the MAX3283E's EN pin is high.
Multidrop Clock Distribution
Low package-to-package skew (8ns max) makes the MAX3280E/MAX3281E/MAX3283E/MAX3284E (VCC = VL) ideal for multidrop clock distribution. When distributing a clock signal to multiple circuits over long transmission lines, receivers in separate locations, and possibly at two different temperatures, would ideally
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15kV ESD-Protected 52Mbps, 3V to 5.5V, SOT23 RS-485/RS-422 True Fail-Safe Receivers
provide the same clock to their respective circuits. Thus, minimal package-to-package skew is critical. The skew must be kept well below the period of the clock signal to ensure that all of the circuits on the network are synchronized. (48k), which allows up to 128 receivers on the bus. Any combination of these RS-485 receivers with a total of 32 unit loads can be connected to the same bus.
MAX3280E/MAX3281E/MAX3283E/MAX3284E
Thermal Protection
The MAX3280E/MAX3281E/MAX3283E/MAX3284E feature thermal protection. Thermal protection sets the output stage in high-impedance mode when a short circuit occurs at the output, limiting both the power dissipation and temperature. The thermal temperature threshold is +165C, with a hysteresis of 20C.
128 Receivers on the Bus
The standard RS-485 input impedance is 12k (oneunit load). The standard RS-485 transmitter can drive 32 unit loads. The MAX3280E/MAX3281E/MAX3283E/ MAX3284E present a 1/4-unit-load input impedance
Test Circuits/Timing Diagrams
VOH RO VOL tPHL 1V -1V A B INPUT fIN = 1MHz tr, tf 3ns VCC/2 OUTPUT tPLH VCC/2
Figure 1. Receiver Propagation Delay
S3 1.5V 1k -1.5V VID R CL S2 S1 VCC
GENERATOR 50
VCC VCC/2 EN tPRZH OUT VCC/2 0 VCC VCC/2 EN tPRHZ tPRLZ OUT 0.25V VOH OUT 0 FOR MAX3281E THE ENABLE SIGNAL IS INVERTED. 0 S1 OPEN S2 CLOSED S3 = 1.5V EN VCC/2 VOH OUT VCC/2 0 S1 OPEN S2 CLOSED S3 = 1.5V EN tPRZL VCC/2
VCC S1 CLOSED S2 OPEN S3 = -1.5V 0
VCC
VOL VCC S1 CLOSED S2 OPEN S3 = -1.5V 0
VCC
0.25V
VOL
Figure 2. MAX3281E/MAX3283E Receiver Enable/Disable Timing _______________________________________________________________________________________ 7
15kV ESD-Protected 52Mbps, 3V to 5.5V, SOT23 RS-485/RS-422 True Fail-Safe Receivers MAX3280E/MAX3281E/MAX3283E/MAX3284E
Test Circuits/Timing Diagrams (continued)
RC 1M CHARGE-CURRENT LIMIT RESISTOR HIGHVOLTAGE DC SOURCE RD 1.5k DISCHARGE RESISTANCE
IP 100% 90% AMPERES
Ir
PEAK-TO-PEAK RINGING (NOT DRAWN TO SCALE)
Cs 100pF
STORAGE CAPACITOR
DEVICE UNDER TEST
36.8% 10% 0 0 tRL TIME tDL CURRENT WAVEFORM
Figure 3a. Human Body ESD Test Model
Figure 3b. Human Body Model Current Waveform
RC 50 to 100 CHARGE-CURRENT LIMIT RESISTOR HIGHVOLTAGE DC SOURCE
RD 330 DISCHARGE RESISTANCE DEVICE UNDER TEST
I 100% 90%
Cs 150pF
STORAGE CAPACITOR
I PEAK
10%
Figure 4a. IEC 1000-4-2 ESD Test Model
t r = 0.7ns to 1ns t 30ns 60ns
Figure 4b. IEC 1000-4-2 ESD Generator Current Waveform
A, 1V/div
RO, 2.5V/div
B = GND 10ns
Figure 5. Receiver Propagation Delay Driven by External RS485 Device 8 _______________________________________________________________________________________
15kV ESD-Protected 52Mbps, 3V to 5.5V, SOT23 RS-485/RS-422 True Fail-Safe Receivers
Typical Operating Circuit
TRANSMITTER DATA IN 120
Chip Information
TRANSISTOR COUNT: 233 PROCESS: BiCMOS
MAX3280E/MAX3281E/MAX3283E/MAX3284E
MAX3283E
EN
RO1
MAX3281E
RO2
MAX3281E/MAX3283E IN REDUNDANT RECEIVER APPLICATION EN
Pin Configurations
TOP VIEW
VCC 1 5 A VCC 1 6 A VCC 1 6 A
GND 2
MAX3280E
GND 2
MAX3281E MAX3283E
5
EN (EN)
GND 2
MAX3284E
5
VL
RO 3
4
B
RO 3
4
B
RO 3
4
B
SOT23-5
SOT23-6
( ) ARE FOR MAX3283E
SOT23-6
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15kV ESD-Protected 52Mbps, 3V to 5.5V, SOT23 RS-485/RS-422 True Fail-Safe Receivers MAX3280E/MAX3281E/MAX3283E/MAX3284E
Package Information
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15kV ESD-Protected 52Mbps, 3V to 5.5V, SOT23 RS-485/RS-422 True Fail-Safe Receivers
Package Information (continued)
6LSOT.EPS
MAX3280E/MAX3281E/MAX3283E/MAX3284E
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________ 11 (c) 2002 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.

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